An optical disk recording/reproducing device includes: a light emitting element which irradiates a laser beam for reproducing/recording onto an optical disk; and a light receiving amplifier element for receiving reflected light from the optical disk. The light amplifier element contains a light receiving element and a light receiving amplifier circuit. The light receiving element receives the reflected light or monitors a laser beam emitted from a laser light source provided as a light source for recording-use and reproducing-use, and converts the light signal into an electronic signal. The light receiving amplifier circuit amplifies the electronic signal (photoelectric transfer signal) thus converted from a light signal by the light receiving element.
FIG. 4 is a view schematically illustrating a structure of an optical pickup device 101, which constitutes a recording and reproducing optical system of a recording and reproducing device for an optical disk 102. The optical pickup device 101 includes a laser diode 103, collimator lenses 104 and 106, a beam splitter 105, an objective lens 107, a spot lens 108, a light receiving amplifier element 109, and light receiving amplifier elements 110 and 111. There may be a case where only one of the light receiving amplifier elements 110 and 111 is provided.
A laser light emitted from the laser diode 103, i.e., a light emitting element serving as a light source for recording-use and reproducing-use, is converted into parallel light by the collimator lens 104. The light path of the parallel light is deflected at 90° by the beam splitter 105, so that the light thus deflected is directed onto the optical disk 102 via the collimator lens 106 and the objective lens 107. Further, the reflected light from the optical disk 102 is transmitted through the objective lens 107, the collimator lens 106, and the beam splitter 105. The reflected light is converged by the spot lens 108 onto the light receiving amplifier element 109. The light receiving amplifier element 109 reproduces an information signal based on the incident light signal, while generating a tracking servo signal and a focusing servo signal. These signals are outputted to a signal processing circuit and a control circuit (not shown). During recording, the light irradiated from the laser diode 103 is modulated according to data to be written. The wavelength of the laser diode 103 is determined depending on a type of the optical disk 102.
In an optical system having the above structure, the light receiving amplifier element 110 is provided in the vicinity of the laser diode 103. The light receiving amplifier element 111 is provided on the opposite side of the laser diode 103, while the beam splitter 105 is disposed in between. The light receiving amplifier elements 110 and 111 receive and monitor part of the outputted light from the laser diode 103, and give feedback to the laser diode 103. This allows the intensity of the laser light to be suitably adjusted.
FIG. 5 illustrates a circuitry of a light receiving amplifier circuit 121 provided in the conventional light receiving amplifier elements 109, 110 and 111.
The light receiving amplifier circuit 121 includes a photodiode PD1, a current-to-voltage conversion circuit (hereinafter referred to as IV amplifier) 122, a reference voltage supplying amplifier (hereinafter referred to as dummy amplifier) 123, and a differential amplifier circuit 124.
The photodiode (light receiving element) PD1 has an anode connected to GND, and a cathode connected to a base of a transistor Tr101.
The IV amplifier 122 includes an amplifier circuit A101, an output circuit B101, and a plurality of feedback resistors Rf1, Rf2, . . . Rfn. The amplifier circuit A101 is constituted by a grounded-emitter amplifier circuit, and the output circuit B101 is constituted by an emitter follower circuit. The IV amplifier 122 converts a current generated by the photodiode PD1 into a voltage, and outputs the voltage thus converted.
The amplifier circuit A101 includes the transistor Tr101 and a constant current source Ica101. The transistor (grounded-emitter transistor) Tr101 is a transistor of NPN type. As noted above, the transistor Tr101 has the base connected to the cathode of the photodiode PD1. Further, the transistor Tr101 has an emitter connected to the GND and a collector connected to the constant current source Ica101 serving as an active load. An input signal is supplied via the base of the transistor Tr101 in the amplifier circuit A101, i.e., the base serves as an input terminal of the IV amplifier 122. An output signal is outputted via the collector (output node) of the transistor Tr101 in the amplifier circuit A101.
The output circuit B101 includes a transistor Tr111 and a constant current source Icb101. The transistor Tr111 is a transistor of NPN type, and has a base connected to the collector of the transistor Tr101, a collector connected to a power source Vcc, and an emitter connected to the constant current source Icb101 serving as an active load. The emitter of the transistor Tr111 serves as an output terminal of the IV amplifier 122. As such, in the IV amplifier 122, the output terminal obtains an output voltage which varies depending on an output signal from the output node of the amplifier circuit A101.
In FIG. 5, basically, an output signal of the IV amplifier is not affected by a subsequent load. Rather, such an output signal is determined according to (i) a voltage VBE of the grounded-emitter Tr and (ii) (a base current of the grounded-emitter Tr)×(the feedback resistor Rf).
Base currents of the transistors Tr101, Tr111, Tr102 and Tr112 are determined by the constant current sources Ica101, Icb101, Ica102 and Icb102 (each base current becomes 1/hFE of the value of its corresponding constant current source), respectively.
Output terminal voltages of the IV amplifier, i.e., emitter voltages of Tr111 and Tr112, are given as follows.
An output voltage during no light emission is found.IB(Tr101)=(Ica101−IB(Tr111)/hFE(Tr101)=Ica101/hFE(Tr101)  [Equation A1].By using the [Equation A1], an output voltage of the IV amplifier 122 during no light emission is found by the following equation A2:An output voltage of the IV amplifier 122 during no light emission=VBE(Tr101)+(IB(Tr101)×Rf)=VBE(Tr101)+(Ica101/hFE(Tr101)×Rf)  [Equation A2],where VBE denotes a voltage between the base and the emitter, IB denotes a base current, and hFE denotes a current amplification factor of the transistor. Further, the following relationship is satisfied:Ica101>>IB(Tr111).
Similarly, an output voltage of the dummy amplifier 123 during no light emission is found as follows.An output voltage of the IV amplifier 123 during no light emission=VBE(Tr102)+(IB(Tr102)×Rf)=VBE(Tr102)+(Ica102/hFE(Tr102)×Rf)  [Equation A3].
Basically, [Equation A2] is equal to [Equation A3].
An output voltage during receiving light is found by the following equation A4:An output voltage of the IV amplifier 122 during receiving light=[an output voltage during no light emission]+[IPD×Rf]  [Equation A4],where IPD denotes a photocurrent during receiving light.
In the IV amplifier 122, the feedback resistors Rf1, Rf2, . . . Rfn are mutually connected in parallel between the output terminal and the base of the transistor Tr101 of the amplifier circuit A101. Thus feedback paths are provided between the output terminal and the base of the transistor Tr101. Further, in the feedback paths, switches sw1, sw2, . . . swn are inserted and connected in series with the feedback resistors Rf1, Rf2, . . . Rfn, respectively (hereinafter, the feedback resistors may be generically referred to as mere feedback resistor(s) Rf). With the switches, the feedback resistors. Rf1, Rf2, . . . Rfn are switched so that either one of the resistors is used. This allows switching of a gain of the light receiving amplifier circuit 121. Such switching operation is done according to (i) whether the optical disk 102 is read out or written or (ii) a variation in inputted light to the light receiving amplifier circuit 121 according to a type of the optical disk 102 (e.g. DVD-R, DVD-RW, DVD-RAM, etc.). This causes the feedback resistor(s) Rf to be selected, thereby switching of the gain of the light receiving amplifier circuit 121.
The dummy amplifier 123 has the same structure as the IV amplifier 122 except that the dummy amplifier 123 has no connection with a light receiving element and contains a capacitor C1 explained later. The dummy amplifier 123 includes an amplifier circuit A102 and an output circuit B102, which correspond to the amplifier circuit A101 and the output circuit B101, respectively. Further, the dummy amplifier 123 includes feedback resistors Rf1, Rf2, . . . Rfn, which are the same as those provided in the IV amplifier 122. The amplifier circuit A102 and the output circuit B102 include the transistors Tr102 and Tr112, respectively, which correspond to the transistors Tr101 and Tr111, respectively. Further, the amplifier circuit A102 and the output circuit B102 include the constant current sources Ica102 and Icb102, respectively, which correspond to the constant current sources Ica101 and Icb101, respectively. The transistors Tr101 and Tr102 have the same electric characteristics, while the transistors Tr111 and Tr112 have the same electric characteristics. Further, the constant current sources Ica101 and Ica102 output the same current, i.e., Ica, while the constant current sources Icb101 and Icb102 output the same current, i.e., Icb.
The dummy amplifier 123 only outputs and supplies a reference voltage to the following differential amplifier circuit 124. Therefore, the dummy amplifier 123 does not need to amplify the inputted light, requiring no connection with a light receiving element. Since the dummy amplifier 123 has substantially the same structure as the IV amplifier 122 as noted above, the dummy amplifier 123 outputs a reference voltage equal to an output voltage of the IV amplifier 122 during no light emission. As such, the dummy amplifier 123 contributes to an improvement in the characteristics of the output voltage of the light receiving amplifier circuit 122 during no light emission (offset voltage).
The differential amplifier circuit 124 receives an output voltage of the IV amplifier 122 and an output voltage of the dummy amplifier 123, and amplifies a difference therebetween. The differential amplifier circuit 124 includes an operational amplifier OP and resistors R101 through R104. The resistor R101 is connected between the output terminal of the IV amplifier 122 and a non-inverting input terminal of the operational amplifier OP. The resistor R102 is connected between a terminal REF and the non-inverting input terminal of the operational amplifier OP. An external reference voltage Vref is supplied via the terminal REF. The resistor R103 is connected between an output terminal of the dummy amplifier 123 and an inverting input terminal of the operational amplifier OP. The resistor 104 is connected between a terminal OUT and the inverting input terminal of the operational amplifier OP. An output voltage Vo of the differential amplifier circuit 124 is outputted via the terminal OUT.
In the differential amplifier circuit 124, the following relationship is satisfied:Vo=Vref+(R2/R1)×(V1−V2),where V1 denotes an output voltage of the IV amplifier 122, V2 denotes an output voltage of the dummy amplifier 123, R1 is a resistance of the resistors R101 and R103, and R2 is a resistance of the resistors R102 and R104.
Since the dummy amplifier 123 does not require a high speed response, the dummy amplifier 123 has a capacitor C1 serving as a band limiting capacitor between an input and an output terminals (between a base and a collector of the transistor Tr102) of the amplifier circuit A102, i.e., grounded-emitter amplifier circuit. Due to the mirror effect, the capacitor C1 of FIG. 5 is equivalent to a capacitor of FIG. 6 which is provided between an input terminal of a grounded-emitter amplifier circuit (a base of a transistor Tr102 and GND, and which has a capacitance of (C1×(1+(VA/VT)). Thus, the capacitor C1 limits a response of the dummy amplifier 123 and reduces a noise at high frequencies. Specifically, when assuming that each output impedance of the emitter follower circuits, i.e. output circuits B101 and B102, is fully low and an that early voltage of the NPN transistor in use is fully high, a time constant CR(C1) derived from the capacitor C1 is expressed by the following equation 1:CR(C1)=(input resistance of dummy amplifier)×(capacitance between base and GND of grounded-emitter transistor)=Rf×C1  [Equation 1],where Rf is the feedback resistance. Thus, the capacitor C1 serves as a filter having the time constant, and contributes to band limiting and noise reduction of the dummy amplifier. When commonly used values are adopted: Rf=10 kΩ; and C1=5 pF, CR(C1) is 50 ns, and a cutoff frequency is expressed by the following equation:Cutoff frequency=1/(2×π×CR)=3.18 MHz.
In FIG. 5, the light directed to the photodiode PD1 varies according to whether reproducing or recording is made to the optical disk 102, or according to the type of the optical disk 102. Therefore, as noted above, according to the light receiving amplifier circuit 121, a plurality of feedback resistors are provided and a feedback resistor (which causes no output saturation, or which is capable of extracting a signal) Rf is appropriately selected by switching the switches. Particularly, as to a DVD disk, in order to extract a signal recorded in the optical disk (disk information or other information), a gain required for reproducing may be temporarily required at the time of recording. That is, during recording operation, a DVD disk requires switching between a feedback resistor for recording-use (low gain) and a feedback resistor for reproducing-use. In this case, for high-speed recording, it is desirable that it takes a shorter time period from the time when the gain is switched to the time when the circuit is stabilized so as to output a signal (hereinafter referred to as stabilization time).
In the light receiving amplifier circuit 121 shown in FIG. 5, it is the dummy amplifier whose response is limited by the capacitor C1 that exhibits the slowest response. The stabilization time for a voltage across the capacitor C1 affects the stabilization time for the light receiving amplifier circuit 121. A variation DVc in the voltages Vc across the capacitor C1 at the time of switching the feedback resistor Rf1 to Rf2 is found by considering a circuitry of FIG. 6 which is equivalent to that of FIG. 5 and in which a capacitor having a capacitance of C1×(1+(VA/VT) is connected between the GND and the input terminal (base) of the amplifier circuit A102 of the grounded-emitter amplifier circuit as shown in FIG. 6. Specifically, the variation DVc is expressed by the following equation 2:DVc=DVbe×(1+exp(−t/((C1×(1+(VA/VT)))×Rf2)))  [Equation 2],where DVbe is a variation in the base voltages of the transistor Tr101 before and after switching the gain, t is an elapsed time after switching the gain, VA is the early voltage of the transistor, VT is a thermal voltage of the transistor (26 mV at 27° C.).Further, the following relationship is given,t=C1×Rf2×(1+(VA/VT))×1n (1/(1−(DVc/DVbe)))  [Equation 3].For example, it takes a time of t (95%) for DVc to reach 95% of the voltage variation DVbe, and the time t(95%) satisfies the following equation:t(95%)=C1×Rf2×(1+(VA/VT))×1n (1/(1−0.95))=3×(1+(VA/VT))×C1×Rf2.When commonly used 50 V, 26 mV, 5 pF, and 10 kΩ are adopted as the variables VA, VT, C1, and Rf2, respectively, t(95%) becomes 288 μs, which is significantly large as compared to 0.222 μs corresponding to a double speed signal band (4.5 MHz) of a DVD. This gives rise to the fact that the stabilization time is too long to extract a signal contained in the disk, even if a feedback resistor Rf (i.e., a gain) is switched during recording operation. Therefore, a problem to be solved is to reduce the stabilization time. As to the aforementioned circuit, refer to the Japanese Unexamined Patent Publication, No. 332546/2000 (Tokukai 2000-332546, publication date: Nov. 30, 2000) and the Japanese Unexamined Patent Publication, No. 296892/1999 (Tokukai 1999-296892, publication date: Oct. 29, 1999).